2.1 Post-silicon Validation Challenges: How EDA and Academia Can Help

1. INTRODUCTION
Post-Silicon validation of large microprocessor designs entails testing of components in a system setting.

It involves multiple different aspects, such as logic validation and debug, electrical validation and debug, and debugging software and customer issues.

The disciplines of post-silicon validation include System Validation (SV), Compatibility Validation (CV), and Electrical Validation (EV)

2. CHALLENGES OF POST-SILICON VALIDATION
In addition, JTAG ports, used to control many of the DFV hooks on the die, are too slow for real-time control and synchronization of events.
(calling for new ways of controlling DFV hooks)

3. SOLUTION VECTORS
3.1 Pre-silicon Engagement
3.2 Post-silicon Opportunities
3.3 Survivability (Post-silicon Debug and Infield Repair)
To assist with debug of the issues in the post-silicon phase and to survive issues in the field, designs need to implement comprehensive survivability features.

3.4 EDA and Research Opportunities