Abstract
1. INTRODUCTION
2. RELATED WORK
3. SYSTEMC IN-SYSTEM EMULATION ARCHITECTURE
3.1 Base Architecture with Acceleration Engines
3.2 Kernel Bypass
4. ONLINE ACCELERATION ASSIGNMENT
4.1 Problem Definition
4.2 Communication Overhead
5. HEURISTICS
5.1 Upper and Lower Bounds
5.2 Accelerator Static Assignment
5.3 Greedy Heuristic
5.4 Aggregate Gain
6. EXPERIMENTS
6.1 Framework
6.2 Evaluation
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